Systems Metrology, Calibration & Hardware Telemetry

This document provides a comprehensive systems-engineering record of all empirical benchmarks, hardware calibration runs, thermal stress tests, and log citations for m4-prefill-engine.

1. Experimental Setup & Metrological Standards

All data in this repository was acquired on physical hardware adhering to strict systems metrology:

 ┌─────────────────────────────────────────────────────────────────────────────┐
 │                      HARDWARE & TEST RIG SPECIFICATIONS                     │
 ├─────────────────────────────────────────────────────────────────────────────┤
 │ • SoC: Apple M4 (10-Core GPU, 4 Performance + 6 Efficiency CPU Cores)       │
 │ • Memory Architecture: 16 GB Unified Memory Architecture (UMA)              │
 │ • Memory Bandwidth: ~99–120 GB/s physical DRAM bandwidth                    │
 │ • System-Level Cache (SLC): 24 MB on-die cache                              │
 │ • Chassis: Fanless Apple MacBook Air (Passive cooling stress environment)    │
 │ • OS: macOS 15.0+ (Darwin Kernel 24.0.0)                                    │
 │ • Metal Shading Language: Metal 3.1 / Metal 3.2                             │
 └─────────────────────────────────────────────────────────────────────────────┘

Metrological Invariants

1. True GPU Hardware Timestamps: Kernel execution times are captured using Metal’s hardware counters (commandBuffer.GPUStartTime and commandBuffer.GPUEndTime), completely isolating kernel execution from CPU driver overhead.
2. Shared Wall-Clock Parity: Cross-engine comparisons against Apple MLX measure total host wall-clock time (commit + waitUntilCompleted for Metal vs mx.eval for MLX).
3. Cold-Cache Isolation: A mandatory 32MB synthetic buffer sweep (memset + read) is executed prior to every benchmark run to flush the 24MB SLC cache and prevent warm-cache distortion.
4. Variance Sampling: All reported values represent the median of 20 measured iterations following 10 discarded warmup iterations, with full [min - max] distributions recorded.

2. Microbenchmark Performance Progression (The 4 Bricks)

Measured on Apple M4 ($K=4096, N=4096, M=128$ tokens):

[!IMPORTANT] Release Scope Notice (v0.2): 1,000,000-token out-of-core flash streaming and speculative burst decoding are active research prototypes and are excluded from the v0.2 release deliverables. Today’s release scope is focused exclusively on in-core prefill acceleration ($M \le 2048$ tokens). Context streaming and decoding benchmarks are deferred and not executed as part of this release cycle.

3. Universal Quantization Router Benchmark Sweep

Measured via bench_universal_router on Apple M4 with double-precision CPU verification:

8B Transformer Tier ($K=4096, N=4096, H=32, D=128$)

4. Full-Layer Cross-Engine Prefill Comparison (Apple MLX vs. Custom Engine)

Measured strictly across in-core unified memory ($M \le 2048$ tokens, 10 warmup, 20 measured iterations, 32MB SLC flush, identical in-RAM synthetic weights, no tokenizer overhead, single forward pass):

• MLX Comparison: Apple MLX Metal vs Our Engine executed directly on identical MLX 4-bit weights (block_mlx_4bit).
• llama.cpp Comparison: llama.cpp baseline vs Our Engine executed directly on identical GGUF Q4_0 weights (block_q4_0).
• In-RAM Invariant: All cross-runner prefill comparisons are kept in-core ($M \le 2048$) without out-of-core streaming or speculative decoding. Source logs in benchmarks/logs/.

8B Architecture (32 Layers, $K=4096, H=32, D=128, N_{\text{mlp}}=14336$)

1B Architecture (16 Layers, $K=2048, H=32, D=64, N_{\text{mlp}}=5632$)

5. 60-Second Thermal Stress Test (Fanless Chassis Stability)

To verify sustained execution stability without active cooling, the engine was subjected to a continuous 60-second saturation test on a fanless Apple M4 MacBook Air:

 ┌─────────────────────────────────────────────────────────────────────────────┐
 │                      60-SECOND THERMAL TEST TELEMETRY                       │
 ├─────────────────────────────────────────────────────────────────────────────┤
 │ • Total Forward Passes Completed: 12,509 passes                             │
 │ • Initial Pass Latency (Cold):     4.78 ms                                  │
 │ • Final Pass Latency (Hot @ 60s):  4.79 ms                                  │
 │ • Thermal Degradation:             0.20% (Zero measurable thermal throttling)│
 │ • Memory Leak Profile:             Zero growth in task_vm_info.phys_footprint│
 └─────────────────────────────────────────────────────────────────────────────┘

6. Raw Benchmark Log Citations

All benchmark figures cited in this documentation suite can be reproduced directly from the committed log artifacts:

• benchmarks/logs/bench_mlx_summary.txt: Full MLX baseline head-to-head metrics.
• benchmarks/logs/bench_scales_8B_*.txt: Complete 8B per-stage component latency breakdowns.
• benchmarks/logs/bench_scales_1B_*.txt: Complete 1B per-stage component latency breakdowns.
• brick2_bench_results.txt: Padded SRAM bank conflict elimination benchmarks.
• brick3_bench_results.txt: Dual-SIMD SwiGLU DRAM churn elimination benchmarks.
• brick4_bench_results.txt: FlashAttention vs Dynamic Q8_0 KV Cache latency sweeps.